广东工业大学学报 ›› 2016, Vol. 33 ›› Issue (01): 36-39.doi: 10.3969/j.issn.10077162.2016.01.007

• 综合研究 • 上一篇    下一篇

DMA控制器在导航基带SoC中的应用

张业强, 刘怡俊   

  1. 广东工业大学 计算机学院,广东 广州 510006
  • 收稿日期:2014-12-25 出版日期:2016-01-16 发布日期:2016-01-16
  • 作者简介:张业强(1989-),男,硕士研究生,主要研究方向为卫星导航与超大规模集成电路设计. 通信作者:刘怡俊(1977-),男,教授,主要研究方向为集成电路设计、低功耗CMOS电路.E-mail:yjliu@gdut.edu.cn
  • 基金资助:

    国家自然科学基金资助项目(61106019)

Implementation of DMA Controller on Navigation Baseband SoC

Zhang Ye-qiang, Liu Yi-jun   

  1. School of Computers, Guangdong University of Technology, Guangzhou 510006, China
  • Received:2014-12-25 Online:2016-01-16 Published:2016-01-16

摘要: 讨论了DMA控制器在基于RTEMS的高性能GPS接收机中的架构设计,实现DMA IP与导航基带整体系统的良好融合.设计了DMA IP的硬件结构,利用复用的思想充分发挥硬件性能,使用寄存器结构和FIFO缓存结构实现了读写控制,并用Verilog HDL语言设计实现了DMA控制器,最后在Altera Cyclone4 FPGA上完成了设计验证.结果表明,DMA控制器能减轻导航基带SoC芯片的处理器负担,缩短捕获跟踪时间,提高系统整体性能.

关键词: DMA控制器; AHB总线; 全球定位系统; 片上系统; 现场可编程门阵列

Abstract: This article discusses the architecture design of DMA controller on high performance GPS receiver based on RTEMS which achieves the optimal integration of DMA IP and navigation baseband system. The authors designed the hardware architecture of DMA IP and made full use of hardware performance with the idea of multiplexing, then used register and FIFO buffer to achieve read-write control. Furthermore, the researchers designed the DMA controller with Verilog HDL and verified the design on Altera Cyclone4 FPGA. The result demonstrates that DMA controller can ease the CPU’s burden and shorten the acquisition & tracking time which improves the performance of the whole system.

Key words: DMA controller; AHB bus; global positioning system(GPS); system on chip; fieldprogrammable gate array (FPGA)

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