广东工业大学学报 ›› 2013, Vol. 30 ›› Issue (3): 37-44.doi: 10.3969/j.issn.1007-7162.2013.03.007

• 综合研究 • 上一篇    下一篇

基于FPGA的高速多通道实时同步采集传输系统的设计与实现

杜玉晓,张浩腾,陈汶育,黄学彬,蔡振典,卓杰   

  1. 广东工业大学 自动化学院,广东 广州 510006
  • 收稿日期:2013-01-29 出版日期:2013-09-30 发布日期:2013-09-30
  • 作者简介:杜玉晓(1973-),男,副教授,博士,主要研究方向为自动化装备与集成技术生物医学工程.
  • 基金资助:

    国家自然科学基金资助项目(61271380)

The Design and Implementation of High-speed Multi-channel and Real-time Synchronous Acquisition Transmission System Based on FPGA

Du Yu-xiao,  Zhang Hao-teng, Chen Wen-yu, Huang Xue-bin, Cai Zhen-dian, Zhuo Jie   

  1. School of Automation, Guangdong University of Technology, Guangzhou 510006,China
  • Received:2013-01-29 Online:2013-09-30 Published:2013-09-30

摘要: 鉴于传统的多导联脑电图机双核控制采集系统中主控器ARM与SDRAM及FPGA的通讯流程繁琐重复,传输效率低,数据吞吐量小等缺陷,提出了一种基于FPGA的高速多通道实时同步采集系统方案,将缓存SDRAM交由FPGA控制并通过程序将其“内部FIFO化”,通过 SDRAM前后两对FIFO的乒乓操作实现SDRAM的异步时钟同时读写,保证FPGA与ARM接口处数据的不间断,并通过简洁严谨的并行接口协议实现FPGA和ARM的高效率通信,最终将FPGA和SDRAM从物理上等效成一块“可自动采集数据的SDRAM”.测试表明,该方案避免了数据转移过程中的重复拷贝以及数据转移复杂的操作缺陷,提高数据吞吐量以及转移速率,满足了256导联脑电图的各项设计指标,采样频率可达20 kHz,甚至更高.

关键词: 256导联脑电图机;高速多通道采集;实时同步技术;FPGA

Abstract: In view of the flaws of repeated and cumbersome communication process, inefficiency and small data throughput of the traditional dualcore control acquisition system of multi-lead EEG machine, it advances a high speed, multi-channel and real-time synchronous acquisition system, based on FPGA. The SDRAM is mainly controlled by FPGA which FIFO-internalizes the SDRAM via the program to achieve the asynchronous clock reading-while-writing of the SDRAM by the ping pong operation of two pairs of FIFO of SDRAM, which ensures the ongoing of interfaces data transmission between FPGA and ARM and efficient communication by concise and rigorous parallel interface agreements. The FPGA and SDRAM can be equivalent to a SDRAM which can automatically collect data. Tests show that this system avoids the repeated copy of transfer process and redundant complex data transfer operation, and improves the data throughput and transfer rate, which meets the requirement for the design indexes of 256-lead EEG machine with the sample frequency up to 20 kHz or even higher.

Key words: 256-lead EEG; the high-speed multi-channel sampling; the technique of real-time synchronization; FPGA

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